The present invention relates to a method for manufacturing a semiconductor device. More particularly, it relates to a technology effectively applicable to a semiconductor device having a split gate type nonvolatile memory.
As one of nonvolatile memories, there is known a MONOS (Metal Oxide Nitride Oxide Semiconductor) memory having a structure of FET (Field Effect Transistor), and accumulating electric charges at an ONO (Oxide Nitride Oxide) film formed between a gate electrode and a substrate, and thereby storing information. Further, MONOS memories include a split gate type nonvolatile memory having a selection gate electrode to be used for selecting a memory cell, and a memory gate electrode formed adjacent to the selection gate via an insulation film, and to be used for storing information.
Patent Document 1 (WO2009/104688) describes that, in a step of forming a split gate type nonvolatile memory element, a semiconductor layer forming a memory gate electrode is embedded in an opening of a pattern forming a control gate electrode. However, herein, it is not described that a dummy gate electrode (a sacrifice pattern not to be left in a finished semiconductor device) is formed. Further, there is no description on a capacitive element.
Patent Document 2 (Japanese Unexamined Patent Publication No. 2009-302269) describes the following: in order to prevent the ONO film from being damaged by ion implantation due to the reduction of each height of the selection gate electrode and the memory gate electrode, the ONO film and the memory gate electrode are formed after the formation of source/drain regions.